We are happy to announce the acceptance of a new paper by UBITECH to the 2026 Conference on Cryptographic Hardware and Embedded Systems (CHES).

Efficient SIMD Implementation of the BLS Signature Scheme Using Intel AVX-512

The BLS digital signature scheme, particularly its instantiation with the BLS12-381 curve, underpins modern blockchain protocols such as Ethereum Proof-of-Stake, thanks to properties like non-interactive signature aggregation. Building on prior work showing that Intel AVX-512’s SIMD capabilities can accelerate the pairing computation at the core of BLS, this paper extends that approach to the scheme as a whole. It presents a highly SIMD-optimised BLS implementation using Intel AVX-512, including the AVX-512IFMA instructions, exploring a wide range of optimisations across elliptic curve arithmetic, scalar multiplication, hash-to-curve, and finite-field arithmetic.

Benchmarks on an Intel Core i3-1005G1 (”Ice Lake”) CPU show the resulting software to be at least 1.57 times faster than an x64 assembly implementation of the widely used blst library.

About CHES 2026

CHES, established in 1999, is the premier venue for research on the design and analysis of cryptographic hardware and software implementations.

As an area conference of the International Association for Cryptologic Research (IACR), bridges the cryptographic research and engineering communities and draws participants from academia, industry, and government.

We extend our congratulations to the UBITECH team.

Want to learn more?
Click here: https://ches.iacr.org/2026/